Download z 80 cpu7/16/2023 PCB Layout - Version 1.2 Input/Output Ports Please refer to Assembly Instructions document Hardware Documentation Schematic and PCB Layout Memory: 512 KiB battery-backed SRAM, 512 KiB Flash ROM, Zeta SBC V2 compatible memory pager.Processor: Zilog* Z80 CPU (CMOS version - Z84C00).Additional storage module is not required, since RomWBW utilizes part of ROM and SRAM for ROM and RAM disks respecitvely, but a Compact Flash module can be added for additional storage. For configurable baud rate settings, it is recommened to use serial modules that can use CLK2 as a clock, for example Steve Cousins' SC132 or SC104 modules. ![]() Minimal CP/M computer system can be built using Z80-512K module, a backplane, and a serial port module, such as Z80 SIO or MC68B50 ACIA. In addition to these functions, Z80-512K includes programmable CLK2 clock divider, support for battery-backed SRAM, power failure NMI generation, and a watchdog. ![]() Z80-512K combines functionality of the following RC2014* modules on a single module, thus saving space on the backplane: Z80-512K is an RC2014*-compatible module, designed to run RomWBW firmware including CP/M, ZSDOS, and various applications under these OSes. Z80 CPU and Memory Module Table of Content
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